It’s been a while since I assembled a piggyback FPGA board, but I had to deal with a short circuit on a terminal caused by a TCXO installation error. The short-circuit occurred on the GND / OscOut side land, where a jumper plug was used to repair a printed pattern that was damaged when pulling
I measured the resistance between the corresponding JTAG port/device on the FPGA board, which was suspected to be broken due to the hole made to access the reset pin of Teensy4.1, and found a delicate value of 40mΩ. Initially, we tried to write the device as it was, but failed to verify it after writing. Unfortunately,
I have started designing adcHandler. In the process of drawing a block diagram on my notebook to summarize the overall structure, I came up with a device that uses a 2-wire + channel CS configuration for high-speed communication. In order to slim down the terminals, I came up with the idea of constructing a circuit
Selected files are now displayed in red. This technique could be applied to displaying I2C and other inputs.
I introduced SdFat.h instead of SD.h, which has a fixed conflict with USB_HOST. By replacing the library with SdFat.h, it is now possible to draw JpegFiles placed on microSD at startup, which was not possible before. In line with the adoption of SdFat, the library for reading SMF was updated to the latest version, and
At this point, the implementation of SdFat was completed, the remaining RAM1 was over 30k, and the efficiency of memory consumption was dramatically improved. The modifications made were from steps 1 to 5, which are described below, and at that stage it was not possible to read out the JPEG file. Perhaps the communication speed
After staying up all night asking questions about how to introduce the SdFat Library to deepseek, I feel that we have nebulously found a way out, but we have not been able to solve the fundamental problem, and the road to practical use is far from over. The problem is that the SD card gets
The specification that the Modulation of LPF is forced to be applied when CombFilter is selected was changed, and a switch LPFmod was added to the Modulator connection line to cut the Modulation input. The switch distribution was set to a single click in the center of the top switch when the LPFmodulation parameter was
Selecting the monaural sequence pattern from 4 notes by triple clicking a top switch on middle.
The dacHandler piggyback board arrived and I immediately machined a hole for the reset switch, but the positioning is delicate, interfering with the X’tal at the very last minute. A jig for writing data to FPGA was fabricated. Then, the firmware was written to the FPGA. Initially, the writing failed because I had forgotten that